A storage device having flash memory as nonvolatile memory has been known. When data is read from the flash memory, voltage is applied to a floating gate, which causes the volume of electrons on the floating gate to change. For this reason, repeated data reading from a certain block leads to a great variation of the volume of electrons, thus causing a bit error, which is referred to as read disturb. To prevent read disturb, inside the storage device that includes the flash memory, the number of times of reading (reading count) is managed and data in the block is copied to a different block when reading is executed a given number of times.
For example, according to a prior technique related to the above process, whether reading is executed at the flash memory or at random access memory (RAM) is controlled according to the frequency of reading from the flash memory and when the frequency of data reading from a given area exceeds a certain value, data in the flash memory is transferred to the RAM. According to another known technique, data reading from flash memory, at which the limited number of times of data reading is allowed because of read disturb, and updating of the number of times of reading for refreshing the flash memory are controlled, based on an access command from a host personal computer (PC). According to still another known technique, when data reading from flash memory is not completed within a given time in a data restoring process, the data reading is suspended, additional data is set, and then data that is to be pushed and created by correcting erroneous data using parity data is written to cache memory (see, e.g., Japanese Laid-Open Patent Publication Nos. 2001-290791 and 2008-181380 and International Publication No. 2009/107213.)
According to the conventional techniques, however, the process of preventing read disturb occurring inside the storage device that includes the flash memory may lead to a drop in response performance to a reading request for the storage device.